The objective of the project is to design and build a Digital Signal Processor based system for video communication. The first system will be connected to a Personal Computer for desktop applications. This project is supervised by Dr. Ashraf Ali Kassim and Dr. S. Ranganath
There are significant modifications from the system designed in the final year project. In order to achieve better performance, the Texas Instruments Multimedia Video Processor (MVP) TMS320C80 will be used. The PCI bus is also used as the host interface in order to increase the bandwidth of data transfer between the system and the host. The overall block diagram is shown in Fig.1.
Fig.1. The Block Diagram
This MVP is one of the most-complicated microprocessor currently available. With one floating point Master Processor (MP) and four fixed point Parallel Digital Signal Processors (PP) in a single chip, the MVP is capable of performing over two billion operations per second [1]. The architecture of the C80 also make it highly suitable for video and imaging application. Besides the five processors mentioned, there are also a video controller and a transfer controller. The video controller provides simultaneous control over two independent frame systems, which can function as either capture or display systems. The transfer controller controls the data transfer between all the processors and the external memory. It can also support direct interface with DRAM, SDRAM and VRAM.
The bandwidth of PCI bus interface is much higher than that of the traditional ISA bus interface. With the 33MHz bus clock, the maximum data transfer rate is 132Mbytes per second [3]. However, the implementation is also more complication that an ISA bus interface. The AMCC S5933 PCI Controller has been selected. This PCI controller can handle the PCI bus control and handshaking signals and also provide a microprocessor type of interface to the PCI bus. Nevertheless, extensive additional logic control is still needed for interfacing the C80 and this PCI controller.
Two SIMM modules are used for the main memory. The size can be either 8M or 32 M Bytes. For better performance, synchronous DRAM can be used.
The video capture module converts the analogue video signal into the digital YUV data. It consists of a Video Input Interface IC (Philips SAA7111), the Field buffer (OKI MSM518221) and the I2C Bus Controller (Philips PCF8584). The Video Input Processor is controlled through the I2C bus and therefore the I2C bus controller provides an interface for microprocessor to I2C bus.
Although the system is attached to a PC, external display function is also implemented in order to provide alternatives and easier conversion to a stand-alone system. It consists of a set of Video RAM, the Video Encoder (Philips SAA7182) and the I2C Bus Controller.
In order to provide more flexibility and allow the MVP to concentrate on image processing task, the audio processing task is taken by the MVP. An additional DSP, TMS320C30 is used for audio processing. The Analog Interface Circuits (Texas Instruments TLC32044C) is used for the analog interface to the C30. The communications between the MVP and the C30 is through a set of Dual-port RAM with mailboxes.
1. Texas Instruments, TMS320C80 Digital Signal Processor User Guides, 1996.
2. Texas Instruments, TMS320C80 Digital Signal Processor Data Sheet, 1996.
3. D.Kim, A Real-time MPEG Encoder Using a Programmable Processor, IEEE
Trans. on Consumer Electronics, Vol.40, No.2, May 1994.
4. PCI Local Bus Specification Rev. 2.1., June 1995.
5. Tom Shanley, Don Anderson, PCI System Architecture, 3rd Edition, Mindshare Inc. 1995.