Fabrication of Silicon Nano Devices

One major research focus in the Silicon Nano Devices Lab (SNDL) is to develop a new gate module process for nano-scale CMOS Integrated Circuits (ICs) with a design rule of 50 nm and beyond. Nano-scale CMOS ICs are of particular importance because of their superior operation speed and higher density of integration. However, there are a number of technical barriers to overcome to achieve successful nano-scale CMOS devices. One critical issue is the leakage current through the gate dielectric which is the most fundamental part of CMOS devices. With the conventional SiO2 dielectric, the thickness required for the nano-scale CMOS devices is below 1 nm, which is impractical because of the huge direct tunneling current. One possible solution is to use materials of higher dielectric constants such that physically thicker films can be used. In this regard, hafnium dioxide-alumina (HfO2–Al2O3) alloy is an excellent candidate gate dielectric material in silicon nano devices.

In our research, a series of HfO2–Al2O3 alloy films with different compositions and with a thickness of 4 to 5 nm were prepared using the Atomic Layer Chemical Vapor Deposition (ALCVD) technique. The energy band alignment of HfO2–Al2O3 to (100) Si has been characterized by high-resolution X-ray Photoelectron Spectroscopy (XPS), which show continuous changes with x in (HfO2)x(Al2O3)1-x. This data was used to estimate the energy gap Eg for (HfO2)x(Al2O3)1-x, the valence band offset DEv and the conduction band offset DEc between (HfO2)x(Al2O3)1-x and the (100) Si substrate. Our results demonstrate that the values of Eg , DEv, and DEc for (HfO2)x(Al2O3)1-x change linearly with x (Figure 1). The information is of vital importance in terms of tunneling current leakage and the reliability study of HfO2–Al2O3 when used as a gate dielectric. 

Figure 1: Dependence of E_g, DE_v, and DE_c for (HfO₂)_x(Al₂O₃)_1-x on HfO₂ mole fraction x.

The kinetics of the interfacial layer growth between HfO2–Al2O3 alloy film and the Si substrate during high-temperature annealing (up to 1000oC) is being studied. The growth of the low-dielectric constant interfacial layer poses a serious limitation in further downscaling of the equivalent oxide thickness for high-dielectric constant gate materials. Our results investigated the much smaller interfacial layer growth for HfO2–Al2O3 alloy film compared to pure HfO2 film during annealing, which means the HfO2–Al2O3 alloy possesses a much stronger resistance to oxygen diffusion than pure HfO2 film. It is further shown that the resistance becomes stronger with more Al incorporated into HfO2. This observation is explained by the combined effects of (i) smaller oxygen diffusion coefficient of Al2O3 than HfO2; and (ii) doping HfO2 with Al raises the film crystallization temperature of HfO2 and, hence, drastically reduces the oxygen diffusion along the grain boundaries during annealing.